Skip to content
#

drc-lvs

Here are 2 public repositories matching this topic...

Designed and simulated ultra low-voltage, low-power CMOS 5:2 compressors in Cadence Virtuoso, based on Figure 13 from the referenced IEEE paper. Focused on optimizing power, delay, and area for efficient high-speed arithmetic circuits used in VLSI and DSP applications.

  • Updated Mar 22, 2026

Improve this page

Add a description, image, and links to the drc-lvs topic page so that developers can more easily learn about it.

Curate this topic

Add this topic to your repo

To associate your repository with the drc-lvs topic, visit your repo's landing page and select "manage topics."

Learn more