0.1.0

Initial release of SYNAPSE, an experimental framework for converting quantized ONNX (QONNX) neural networks into synthesizable VHDL for FPGA deployment.

Features

• QONNX-to-VHDL conversion with automatic network generation
• Supported layers: Dense, Conv1D, MaxPooling, AveragePooling, Argmax, Thresholding
• Complete toolchain: ROM generation, testbench creation, cycle-accurate simulation
• Audio preprocessing: MFCC extraction for keyword spotting applications

Validation

Simulation (ModelSim/Questa):

• Keyword spotting network from QONNX Model Zoo
• Google Speech Commands V2 dataset
• 88% accuracy with bit-accurate equivalence to QONNX model

Synthesis (Xilinx Vivado ML 2025.1):

• Target: Zynq Ultrascale+ ZU9EG
• Resource usage: 36% LUT, 40% FF, 5% BRAM, 0% DSP

Installation

See README.md for installation instructions and usage_example.py for a complete workflow example.

Known Limitations

This is an experimental research framework:

• Not all layer combinations extensively tested
• Limited error handling in generation pipeline

Tested configurations: KWS network (fully validated), Dense + threshold layers (validated)

Acknowledgments

Developed at the Institute of Embedded Systems, ZHAW, as part of the REBECCA project, funded by the European Union under Grant Agreement No. 101097224.