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Fixed inconsistencies between time/timestamp.
1 parent 547dd8b commit fa23272

11 files changed

+24
-11
lines changed

README.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,7 @@ for (const auto& record : samples)
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{
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const auto timestamp = record.metadata().timestmap().value();
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const auto cpu_id = record.metadata().cpu_id().value();
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const auto instruction = record.instruction_execution().instruction_pointer().value();
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const auto instruction = record.instruction_execution().logical_instruction_pointer().value();
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std::cout
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<< "Time = " << timestamp << " | CPU = " << cpu_id

examples/address_sampling.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ main()
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/// Setup which data will be included into samples (timestamp, virtual memory address, data source like L1d or RAM,
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/// and latency).
34-
sampler.values().time(true).logical_memory_address(true).data_source(true).latency(true);
34+
sampler.values().timestamp(true).logical_memory_address(true).data_source(true).latency(true);
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/// Create random access benchmark.
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auto benchmark = perf::example::AccessBenchmark{ /*randomize the accesses*/ true,

examples/branch_sampling.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@ main()
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sampler.trigger("cycles", perf::Precision::AllowArbitrarySkid);
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/// Setup which data will be included into samples (timestamp and stack of branches).
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sampler.values().time(true).branch_stack(
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sampler.values().timestamp(true).branch_stack(
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{ perf::BranchType::User, perf::BranchType::Conditional }) /// Only sample conditional branches in user-mode.
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;
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examples/context_switch_sampling.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ main()
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sampler.trigger("cycles", perf::Precision::RequestZeroSkid);
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/// Include Timestamp, period, instruction pointer, and CPU number into samples.
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sampler.values().time(true).cpu_id(true).context_switch(true);
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sampler.values().timestamp(true).cpu_id(true).context_switch(true);
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/// Create random access benchmark.
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auto benchmark = perf::example::AccessBenchmark{ /*randomize the accesses*/ true,

examples/counter_sampling.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ main()
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sampler.trigger("cycles", perf::Precision::AllowArbitrarySkid);
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/// Setup which data should be included (L1 hit and miss counter, timestamp).
30-
sampler.values().counter({ "L1-dcache-loads", "L1-dcache-load-misses", "L1d-misses-per-load" }).time(true);
30+
sampler.values().counter({ "L1-dcache-loads", "L1-dcache-load-misses", "L1d-misses-per-load" }).timestamp(true);
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/// Create random access benchmark.
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auto benchmark = perf::example::AccessBenchmark{ /*randomize the accesses*/ true,

examples/instruction_pointer_sampling.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@ main()
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sampler.trigger("cycles", perf::Precision::RequestZeroSkid, perf::Period{ 4000U });
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/// Include Timestamp, period, instruction pointer, and CPU number into samples.
24-
sampler.values().time(true).period(true).instruction_pointer(true).cpu_id(true);
24+
sampler.values().timestamp(true).period(true).instruction_pointer(true).cpu_id(true);
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/// Create random access benchmark.
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auto benchmark = perf::example::AccessBenchmark{ /*randomize the accesses*/ true,

examples/multi_cpu_sampling.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@ main()
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sampler.trigger("cycles");
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/// Setup what data the samples should include (timestamp, instruction pointer, CPU id, thread id).
37-
sampler.values().time(true).instruction_pointer(true).cpu_id(true).thread_id(true);
37+
sampler.values().timestamp(true).instruction_pointer(true).cpu_id(true).thread_id(true);
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/// Create random access benchmark.
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auto benchmark = perf::example::AccessBenchmark{ /*randomize the accesses*/ true,

examples/multi_event_sampling.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ main()
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}
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/// Define what to sample.
39-
sampler.values().time(true).logical_memory_address(true).data_source(true).latency(true);
39+
sampler.values().timestamp(true).logical_memory_address(true).data_source(true).latency(true);
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/// Create random access benchmark.
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auto benchmark = perf::example::AccessBenchmark{ /*randomize the accesses*/ true,

examples/multi_thread_sampling.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@ main()
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sampler.trigger("cycles");
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/// Setup what data the samples should include (timestamp, instruction pointer, CPU id, thread id).
32-
sampler.values().time(true).instruction_pointer(true).cpu_id(true).thread_id(true);
32+
sampler.values().timestamp(true).instruction_pointer(true).cpu_id(true).thread_id(true);
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/// Create random access benchmark.
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auto benchmark = perf::example::AccessBenchmark{ /*randomize the accesses*/ true,

examples/register_sampling.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@ main()
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auto sampler = perf::Sampler{ counter_definitions, perf_config };
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sampler.trigger("cycles");
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sampler.values()
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.time(true)
25+
.timestamp(true)
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.user_registers(
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perf::Registers{ { perf::Registers::x86::IP, perf::Registers::x86::DI, perf::Registers::x86::R10 } })
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.kernel_registers(

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