HDMI Passthrough not yet lit

[Rivanfirdausa]

Previously, I had already granted access and modified aborts.c to allow the firmware to access the hardware. but it still didn't work. Here I attach the config.c and dts linux that I use.
#include <config.h>

VM_IMAGE(linux_vm1_image, XSTR(BAO_DEMOS_WRKDIR_IMGS/linux_vm1.bin));

struct config config = {

CONFIG_HEADER

.shmemlist_size = 1,
.shmemlist = (struct shmem[]) {
    [0] = { .size = 0x00010000, }
},

.vmlist_size = 1,
.vmlist = {
    /* VM 1 - Linux Guest */
    {
        .image = {
            .base_addr = 0x80200000,
            .load_addr = VM_IMAGE_OFFSET(linux_vm1_image),
            .size = VM_IMAGE_SIZE(linux_vm1_image)
        },

        .entry = 0x80200000,
        .cpu_affinity = 0b000111, /* CPU 0, 1*/

        .platform = {
            .cpu_num = 2,

            .region_num = 1,
            .regions =  (struct vm_mem_region[]) {
                {
                    .base = 0x80200000,
                    .size = 0x20000000, /* 512MB RAM */
                    .place_phys = 1,
                    .phys = 0x80200000
                }
            },

            .ipc_num = 1,
            .ipcs = (struct ipc[]) {
                {
                    .base = 0xf0000000,
                    .size = 0x00010000,
                    .shmem_id = 0,
                    .interrupt_num = 1,
                    .interrupts = (irqid_t[]) {52}
                }
            },
            
            /* Device Passthrough */
            .dev_num = 20,/*/ Update jumlah device */
            .devs =  (struct vm_dev_region[]) {
                { /* 1. Arch timer */
                    .interrupt_num = 1, .interrupts = (irqid_t[]) {27}
                },
                { /* 2. GPR */
                    .pa = 0x30340000, .va = 0x30340000, .size = 0x10000,
                },
                { /* 3. Anatop */
                    .pa = 0x30360000, .va = 0x30360000, .size = 0x10000,
                },
                { /* 4. CCM */
                    .pa = 0x30380000, .va = 0x30380000, .size = 0x10000,
                    .interrupt_num = 2, .interrupts = (irqid_t[]) {117, 118},
                },
                { /* 5. GPIO1 */
                    .pa = 0x30200000, .va = 0x30200000, .size = 0x10000,
                    .interrupt_num = 2, .interrupts = (irqid_t[]) {96, 97},
                },
                { /* 6. IOMUXC */
                    .pa = 0x30330000, .va = 0x30330000, .size = 0x10000,
                },
                { /* 7. OCOTP */
                    .pa = 0x30350000, .va = 0x30350000, .size = 0x10000,
                },
                { /* 8. Ethernet */
                    .pa = 0x30bf0000, .va = 0x30bf0000, .size = 0x10000,
                    .interrupt_num = 3, .interrupts = (irqid_t[]) {167, 166, 42},
                },
                { /* 9. UART3 */
                    .pa = 0x30880000, .va = 0x30880000, .size = 0x10000,
                    .interrupt_num = 1, .interrupts = (irqid_t[]) {60} 
                },
                { /* 10. SRC */
                    .pa = 0x30390000, .va = 0x30390000, .size = 0x10000,
                },
                { /* 11. GPC */
                    .pa = 0x303a0000, .va = 0x303a0000, .size = 0x10000,
                    .interrupt_num = 1, .interrupts = (irqid_t[]) {119} 
                },
                { /* 12. Watchdog */
                    .pa = 0x30280000, .va = 0x30280000, .size = 0x10000,
                    .interrupt_num = 1, .interrupts = (irqid_t[]) {110}
                },
                { /* 13. USDHC3 */
                    .pa = 0x30b60000, .va = 0x30b60000, .size = 0x10000,
                    .interrupt_num = 1, .interrupts = (irqid_t[]) {56} 
                },
                { /* 14. USB Phy */
                    .pa = 0x38100000, .va = 0x38100000, .size = 0x200000,
                    .interrupt_num = 2, .interrupts = (irqid_t[]) {72, 73}
                },
                { /* 15. USB Glue */
                    .pa = 0x32f10000, .va = 0x32f10000, .size = 0x10000,
                    .interrupt_num = 1, .interrupts = (irqid_t[]) {48}
                },
                
                /* --- DISPLAY SUBSYSTEM (SPLIT REGIONS) --- */

                /* 16. Area LCDIF + BLK_CTRL + PAVI + IRQSTEER */
                /* Mulai: 32fc0000. Stop sebelum 32fd8000 (HDMI TX) */
                /* Size 0x18000 = 96KB. Range: 32fc0000 - 32fd7fff */
                {
                    .pa = 0x32fc0000, 
                    .va = 0x32fc0000, 
                    .size = 0x20000, 
                    .interrupt_num = 2, 
                    .interrupts = (irqid_t[]) {40, 43} /* 40=LCDIF, 75=IRQSTEER */
                },

                /* 17. Area HDMI TX Controller */
                /* Mulai: 32fd8000. Size 64KB */
                {
                    .pa = 0x32fd8000, 
                    .va = 0x32fd8000, 
                    .size = 0x10000, 
                    /* Interrupt HDMI TX asli adalah SPI 4 -> ID 36. 
                       Tapi biasanya lewat IRQSTEER. Kita pasang 36 jaga-jaga */
                    .interrupt_num = 1,
                    .interrupts = (irqid_t[]) {36}
                },

                /* 18. Area HDMI PHY */
                /* Mulai: 32fdff00. Size 256 bytes */
                {
                    .pa = 0x32fdff00, 
                    .va = 0x32fdff00, 
                    .size = 0x1000,
                },

                /* 19. I2C2 (Untuk DDC HDMI) - WAJIB ADA AGAR TIDAK ABORT */
                /* Address: 30a30000. Interrupt: SPI 36 -> ID 68 */
                {
                    .pa = 0x30a30000, 
                    .va = 0x30a30000, 
                    .size = 0x10000, 
                    .interrupt_num = 1, 
                    .interrupts = (irqid_t[]) {68}
                },
                
                /* 20. I2C3 (Jaga-jaga jika Verdin pakai I2C3) */
                {
                    .pa = 0x30a40000, 
                    .va = 0x30a40000, 
                    .size = 0x10000, 
                    .interrupt_num = 1, 
                    .interrupts = (irqid_t[]) {69}
                },

            },

            .arch = {
                .gic = {
                   .gicd_addr = 0x38800000,
                   .gicr_addr = 0x38880000
                },
            }
        },
    },
},

};

and dts
/dts-v1/;

/* --- Reset & Power Domain Constants --- */
#define IMX8MP_HDMI_BLK_CTRL_HDMI_TX_RESET 0
#define IMX8MP_HDMI_BLK_CTRL_HDMI_PHY_RESET 1

/* NXP i.MX8MP HDMI Power Domain Indexes */
#define IMX8MP_HDMIBLK_PD_IRQSTEER 0
#define IMX8MP_HDMIBLK_PD_LCDIF 1
#define IMX8MP_HDMIBLK_PD_PAI 2
#define IMX8MP_HDMIBLK_PD_PVI 3
#define IMX8MP_HDMIBLK_PD_TRNG 4
#define IMX8MP_HDMIBLK_PD_HDMI_TX 5
#define IMX8MP_HDMIBLK_PD_HDMI_TX_PHY 6
#define IMX8MP_HDMIBLK_PD_HRV 7
#define IMX8MP_HDMIBLK_PD_LCDIF_APB 8

/ {
#size-cells = <0x1>;
#address-cells = <0x1>;

model = "Toradex Verdin iMX8M Plus - NATIVE GPC CLOCK FIX";
compatible =  "toradex,verdin-imx8mp-wifi-dahlia",
              "toradex,verdin-imx8mp-wifi",
              "toradex,verdin-imx8mp",
              "fsl,imx8mp";

chosen {
    stdout-path = &uart3;
    /* Permissive wajib agar driver tidak saling antre selamanya */
    bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200 clk_ignore_unused root=/dev/mmcblk0p2 rootwait rw video=HDMI-A-1:1920x1080M@60 video=HDMI-A-1:e fw_devlink=permissive";
};

aliases {
    ethernet0 = &eqos;
    gpio0 = &gpio1;
    serial2 = &uart3;
    usb0 = &usb3_0;
    usb1 = &usb3_1;
};

/* --- CPU & MEMORY --- */
cpus {
    #size-cells = <0x0>;
    #address-cells = <0x1>;
    cpu@0 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0>; enable-method = "psci"; };
    cpu@1 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x1>; enable-method = "psci"; };
};

psci { compatible = "arm,psci-0.2"; method = "smc"; };

memory@80200000 {
    reg = <0x80200000 0x20000000>;
    device_type = "memory";
};  

/* --- SOC CONTAINER --- */
soc {
    compatible = "simple-bus";
    #address-cells = <1>;
    #size-cells = <1>;
    ranges;

    gic: intc@38800000 {
        compatible = "arm,gic-v3";
        reg = <0x38800000 0x10000 0x38880000 0xc0000>;
        interrupt-controller;
        #interrupt-cells = <0x03>;
        interrupt-parent = <&gic>;
    };

    timer {
        compatible = "arm,armv8-timer";
        interrupt-parent = <&gic>;
        interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
    };

    /* CLOCKS */
    osc_32k: clock-osc-32k { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32768>; clock-output-names = "osc_32k"; };
    osc_24m: clock-osc-24m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000000>; clock-output-names = "osc_24m"; };
    
    /* DUMMY CLOCKS UNTUK MENCEGAH DEADLOCK SAAT PROBE */
    clk_dummy_ipg: clock-dummy-ipg { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <66000000>; };
    clk_dummy_usb_bus: clock-dummy-usb-bus { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <500000000>; };
    clk_dummy_usb_ref: clock-dummy-usb-ref { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <100000000>; };

    clk_ext1: clock-ext1 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <133000000>; clock-output-names = "clk_ext1"; };
    clk_ext2: clock-ext2 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <133000000>; clock-output-names = "clk_ext2"; };
    clk_ext3: clock-ext3 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; clock-output-names = "clk_ext3"; };
    clk_ext4: clock-ext4 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; clock-output-names = "clk_ext4"; };

    anatop: anatop@30360000 {
        compatible = "fsl,imx8mp-anatop", "fsl,imx8mm-anatop", "syscon", "simple-mfd";
        reg = <0x30360000 0x10000>;
    };

    clk: clock-controller@30380000 {
        compatible = "fsl,imx8mp-ccm";
        reg = <0x30380000 0x10000>;
        #clock-cells = <1>;
        clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, <&clk_ext3>, <&clk_ext4>;
        clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", "clk_ext3", "clk_ext4";
        fsl,anatop = <&anatop>;
        status = "okay";
    };

    /* --- RUMAH ASLI UNTUK POWER DOMAINS (GPC) --- */
    gpc: gpc@303a0000 {
        compatible = "fsl,imx8mp-gpc";
        reg = <0x303a0000 0x10000>;
        interrupt-parent = <&gic>;
        interrupts = <0 87 4>;
        interrupt-controller;
        #interrupt-cells = <3>;
        status = "okay";

        pgc {
            #address-cells = <1>;
            #size-cells = <0>;

            pgc_mediamix: power-domain@13 {
                #power-domain-cells = <0>;
                reg = <13>;
                /* Memakai dummy clock agar GPC tidak timeout menunggu CCM siap */
                clocks = <&clk_dummy_ipg>; 
            };

            pgc_hdmimix: power-domain@17 {
                #power-domain-cells = <0>;
                reg = <17>;
                clocks = <&clk_dummy_ipg>;
            };

            pgc_hdmiphy: power-domain@18 {
                #power-domain-cells = <0>;
                reg = <18>;
            };
        };
    };

    /* Regulators */
    reg_usb1_vbus: regulator-usb1 {
        compatible = "regulator-fixed";
        regulator-name = "USB_1_EN";
        regulator-min-microvolt = <5000000>;
        regulator-max-microvolt = <5000000>;
        gpio = <&gpio1 12 0>;
        enable-active-high;
        regulator-always-on;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb1_vbus>;
    };

    reg_usb2_vbus: regulator-usb2 {
        compatible = "regulator-fixed";
        regulator-name = "USB_2_EN";
        regulator-min-microvolt = <5000000>;
        regulator-max-microvolt = <5000000>;
        gpio = <&gpio1 14 0>;
        enable-active-high;
        regulator-always-on;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb2_vbus>;
    };

    /* --- DISPLAY SUBSYSTEM --- */
    hdmi-connector {
        compatible = "hdmi-connector";
        ddc-i2c-bus = <&i2c2>; 
        label = "hdmi";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_hdmi_hog>;
        type = "a";
        status = "okay";

        port {
            hdmi_connector_in: endpoint { remote-endpoint = <&hdmi_out>; };
        };
    };

    display-subsystem {
        compatible = "fsl,imx-display-subsystem";
        ports = <&lcdif_out>;
    };

    hdmi_blk_ctrl: hdmi-blk-ctrl@32fc0000 {
        compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon";
        reg = <0x32fc0000 0x1000>;
        #clock-cells = <0x01>;
        #reset-cells = <0x01>;
        
        /* TERSAMBUNG KE GPC RESMI */
        #power-domain-cells = <1>;
        power-domains = <&pgc_mediamix>, <&pgc_hdmimix>, <&pgc_hdmiphy>;
        power-domain-names = "bus", "tx", "phy";
        
        clocks = <&clk 0x64>, <&clk 0x63>, <&clk 0x66>, <&clk 0x65>, 
                 <&clk 0x67>, <&clk 0x68>, <&clk 0x69>, <&clk 0x6a>,
                 <&clk 0x6b>, <&clk 0x6c>, <&clk 0x6d>, <&clk 0x6e>;
        clock-names = "apb", "axi", "ref_266m", "ref_24m", 
                      "phy_ref", "fdcc", "bist", "bist_ref", 
                      "phy_apb", "phy_axi", "phy_cit", "phy_cfg";

        /* MENJAMIN CLOCK BERDETAK AGAR TIDAK ERROR -110 TIMEOUT */
        assigned-clocks = <&clk 0x64>, <&clk 0x63>, <&clk 0xa7>;
        assigned-clock-parents = <&clk 0x40>, <&clk 0x33>, <&clk 0x02>;
        assigned-clock-rates = <500000000>, <133000000>, <24000000>;
        
        status = "okay";
    };

    irqsteer: interrupt-controller@32fc2000 {
        compatible = "fsl,imx-irqsteer";
        reg = <0x32fc2000 0x1000>;
        interrupts = <0 43 4>;
        interrupt-parent = <&gic>;
        interrupt-controller;
        #interrupt-cells = <1>;
        fsl,channel = <1>;
        fsl,num-irqs = <64>;
        clocks = <&hdmi_blk_ctrl 0x06>;
        clock-names = "ipg";
        power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_IRQSTEER>;
        
        assigned-clocks = <&clk 0x63>;
        assigned-clock-parents = <&clk 0x33>;
        assigned-clock-rates = <133000000>;
        
        status = "okay";
    };

    hdmi-pai-pvi@32fc4000 {
        compatible = "fsl,imx8mp-hdmi-pavi";
        reg = <0x32fc4000 0x1000>;
        clocks = <&hdmi_blk_ctrl 0x20>, <&hdmi_blk_ctrl 0x17>;
        clock-names = "pvi_clk", "pai_clk";
        resets = <&hdmi_blk_ctrl 0x02>, <&hdmi_blk_ctrl 0x03>;
        reset-names = "pai_rst", "pvi_rst";
        power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PAI>;
        status = "okay";
    };

    lcd-controller@32fc6000 {
        #address-cells = <0x01>;
        #size-cells = <0x00>;
        compatible = "fsl,imx8mp-lcdif3";
        reg = <0x32fc6000 0x10000>;
        
        clocks = <&hdmiphy 0x00>, <&clk 0x64>, <&clk 0x63>, <&hdmi_blk_ctrl 0x00>, 
                 <&hdmi_blk_ctrl 0x01>, <&hdmi_blk_ctrl 0x03>, <&hdmi_blk_ctrl 0x05>, 
                 <&hdmi_blk_ctrl 0x09>, <&hdmi_blk_ctrl 0x0a>, <&hdmi_blk_ctrl 0x0b>, 
                 <&hdmi_blk_ctrl 0x0c>, <&hdmi_blk_ctrl 0x0d>, <&hdmi_blk_ctrl 0x07>;
        clock-names = "pix", "disp-axi", "disp-apb", "mix_apb", 
                      "mix_axi", "xtl_24m", "mix_pix", "lcdif_apb", 
                      "lcdif_axi", "lcdif_pdi", "lcdif_pix", "lcdif_spu", "noc_hdmi";
        
        interrupts = <0x08 0x04>;
        interrupt-parent = <&irqsteer>; 
        resets = <&hdmi_blk_ctrl 0x07>;
        power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_LCDIF>;

        assigned-clocks = <&clk 0x64>, <&clk 0x63>;
        assigned-clock-parents = <&clk 0x40>, <&clk 0x33>;
        assigned-clock-rates = <500000000>, <133000000>;

        status = "okay";

        port@0 {
            reg = <0x00>;
            lcdif_out: endpoint { remote-endpoint = <&hdmi_blk_in>; };
        };
    };

    hdmi@32fd8000 {
        compatible = "fsl,imx8mp-hdmi";
        reg = <0x32fd8000 0x7eff>;
        interrupts = <0x00 0x04>;
        interrupt-parent = <&irqsteer>; 
        
        clocks = <&clk 0x63>, <&clk 0xa7>, <&hdmi_blk_ctrl 0x1d>, 
                 <&hdmi_blk_ctrl 0x1b>, <&hdmi_blk_ctrl 0x1a>, <&hdmi_blk_ctrl 0x19>, 
                 <&hdmi_blk_ctrl 0x18>, <&hdmi_blk_ctrl 0x15>, <&hdmi_blk_ctrl 0x14>, 
                 <&hdmi_blk_ctrl 0x13>, <&hdmi_blk_ctrl 0x0e>, <&hdmi_blk_ctrl 0x24>;
        clock-names = "iahb", "isfr", "phy_int", "prep_clk", 
                      "skp_clk", "sfr_clk", "pix_clk", "cec_clk", 
                      "apb_clk", "hpi_clk", "fdcc_ref", "pipe_clk";
                      
        phys = <&hdmiphy>; 
        phy-names = "hdmi";
        resets = <&hdmi_blk_ctrl 0x00>;
        gpr = <&gpr>; 
        power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>;

        assigned-clocks = <&clk 0x63>, <&clk 0x64>, <&clk 0xa7>;
        assigned-clock-parents = <&clk 0x33>, <&clk 0x40>, <&clk 0x02>;
        assigned-clock-rates = <133000000>, <500000000>, <24000000>;

        status = "okay";

        port@0 { hdmi_blk_in: endpoint { remote-endpoint = <&lcdif_out>; }; };
        port@1 { hdmi_out: endpoint { remote-endpoint = <&hdmi_connector_in>; }; };
    };

    hdmiphy: hdmiphy@32fdff00 {
        compatible = "fsl,samsung-hdmi-phy";
        reg = <0x32fdff00 0x100>;
        #clock-cells = <0x01>;
        clocks = <&hdmi_blk_ctrl 0x1c>, <&hdmi_blk_ctrl 0x03>;
        clock-names = "apb", "ref";
        clock-output-names = "hdmi_phy";
        #phy-cells = <0x00>;
        resets = <&hdmi_blk_ctrl 0x01>;
        power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>;
        status = "okay";
    };

    gpr: iomuxc-gpr@30340000 { 
        compatible = "fsl,imx8mp-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon";
        reg = <0x30340000 0x10000>;
    };

    iomuxc: pinctrl@30330000 {
        compatible = "fsl,imx8mp-iomuxc";
        reg = <0x30330000 0x10000>;

        pinctrl_eqos: eqosgrp {
            fsl,pins = <
                0x054 0x2B4 0x000 0x0 0x0  0x3
                0x058 0x2B8 0x590 0x0 0x1  0x3
                0x07C 0x2DC 0x000 0x0 0x0  0x91
                0x080 0x2E0 0x000 0x0 0x0  0x91
                0x084 0x2E4 0x000 0x0 0x0  0x91
                0x088 0x2E8 0x000 0x0 0x0  0x91
                0x078 0x2D8 0x000 0x0 0x0  0x91
                0x074 0x2D4 0x000 0x0 0x0  0x91
                0x068 0x2C8 0x000 0x0 0x0  0x1f
                0x064 0x2C4 0x000 0x0 0x0  0x1f
                0x060 0x2C0 0x000 0x0 0x0  0x1f
                0x05C 0x2BC 0x000 0x0 0x0  0x1f
                0x06C 0x2CC 0x000 0x0 0x0  0x1f
                0x070 0x2D0 0x000 0x0 0x0  0x1f
            >;
        };

        pinctrl_uart3: uart3grp {
            fsl,pins = <
                0x234 0x494 0x000 0x0 0x0 0x140
                0x238 0x498 0x5F0 0x0 0x2 0x140
            >;
        };

        pinctrl_usdhc3: usdhc3grp {
            fsl,pins = <
                0x150 0x3b0 0x000 0x0 0x0 0x196 
                0x154 0x3b4 0x600 0x0 0x1 0x1d6 
                0x158 0x3b8 0x000 0x0 0x0 0x1d6 
                0x15c 0x3bc 0x000 0x0 0x0 0x1d6 
                0x160 0x3c0 0x000 0x0 0x0 0x1d6 
                0x164 0x3c4 0x000 0x0 0x0 0x1d6 
                0x168 0x3c8 0x000 0x0 0x0 0x1d6 
                0x16c 0x3cc 0x000 0x0 0x0 0x1d6 
                0x170 0x3d0 0x000 0x0 0x0 0x1d6 
                0x174 0x3d4 0x000 0x0 0x0 0x1d6 
                0x178 0x3d8 0x000 0x0 0x0 0x196 
            >;
        };
        
        pinctrl_usb1_vbus: usb1grp { fsl,pins = < 0x040 0x2A0 0x000 0x0 0x0 0x19 >; };
        pinctrl_usb2_vbus: usb2grp { fsl,pins = < 0x048 0x2A8 0x000 0x0 0x0 0x19 >; };
        
        pinctrl_hdmi_hog: hdmihoggrp {
            fsl,pins = <
                0x240 0x4a0 0x00 0x00 0x00 0x400001c3 
                0x244 0x4a4 0x00 0x00 0x00 0x400001c3 
                0x24c 0x4ac 0x00 0x00 0x00 0x40000019 
            >;
        };
        
        i2c2grp: i2c2grp { fsl,pins = <0x208 0x468 0x5ac 0x00 0x02 0x400001c6 0x20c 0x46c 0x5b0 0x00 0x02 0x400001c6>; };
        i2c1grp: i2c1grp { fsl,pins = <0x200 0x460 0x5a4 0x00 0x02 0x400001c6 0x204 0x464 0x5a8 0x00 0x02 0x400001c6>; };
        i2c3grp: i2c3grp { fsl,pins = <0x210 0x470 0x5b4 0x00 0x04 0x400001c6 0x214 0x474 0x5b8 0x00 0x04 0x400001c6>; };
    };
    
    gpio1: gpio@30200000 {
        compatible = "fsl,imx8mp-gpio", "fsl,imx35-gpio";
        reg = <0x30200000 0x10000>;
        interrupts = <0 64 4>, <0 65 4>;
        interrupt-parent = <&gic>;
        clocks = <&clk_dummy_ipg>;
        gpio-controller; 
        #gpio-cells = <2>;
        interrupt-controller; 
        #interrupt-cells = <2>;
    };

    i2c2: i2c@30a30000 {
        compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c";
        reg = <0x30a30000 0x10000>;
        interrupts = <0 36 4>;
        interrupt-parent = <&gic>;
        clocks = <&clk 0x6e>; 
        clock-names = "ipg";
        status = "okay";
        #address-cells = <1>;
        #size-cells = <0>;
        pinctrl-names = "default";
        pinctrl-0 = <&i2c2grp>;
    };

    uart3: serial@30880000 {
        compatible = "fsl,imx8mp-uart", "fsl,imx6q-uart";
        reg = <0x30880000 0x10000>;
        interrupts = <0 28 4>;
        interrupt-parent = <&gic>;
        /* FIX CLOCK UART (Mencegah log alien/rusak) */
        clocks = <&clk 0xfd>, <&clk 0xfd>; 
        clock-names = "ipg", "per";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart3>;
        status = "okay";
    };

    wdog1: watchdog@30280000 {
        compatible = "fsl,imx8mp-wdt", "fsl,imx21-wdt";
        reg = <0x30280000 0x10000>;
        interrupts = <0 78 4>;
        clocks = <&osc_24m>; 
        status = "okay";
    };

    ocotp: efuse@30350000 {
        compatible = "fsl,imx8mp-ocotp", "fsl,imx8mm-ocotp", "syscon";
        reg = <0x30350000 0x10000>;
        clocks = <&clk 214>;
        #address-cells = <1>;
        #size-cells = <1>;
        eth_mac1: mac-address@90 { reg = <0x90 6>; };
        eth_mac2: mac-address@96 { reg = <0x96 6>; };
    };

    usb3_phy0: usb-phy@381f0040 {
        compatible = "fsl,imx8mp-usb-phy";
        reg = <0x381f0040 0x40>;
        clocks = <&clk_dummy_ipg>;
        clock-names = "phy";
        vbus-supply = <&reg_usb1_vbus>; 
        #phy-cells = <0>;
        status = "okay";
    };

    usb3_0: usb@32f10100 {
        compatible = "fsl,imx8mp-dwc3";
        reg = <0x32f10100 0x04>; 
        clocks = <&clk_dummy_usb_bus>, <&clk_dummy_ipg>, <&clk_dummy_ipg>;
        clock-names = "bus_early", "hsio", "suspend";
        interrupt-parent = <&gic>;
        interrupts = <0 148 4>;
        #address-cells = <1>;
        #size-cells = <1>;
        ranges;
        status = "okay";

        usb_dwc3_0: usb@38100000 {
            compatible = "snps,dwc3";
            reg = <0x38100000 0x10000>;
            clocks = <&clk_dummy_usb_bus>, <&clk_dummy_usb_ref>, <&clk_dummy_ipg>;
            clock-names = "bus_early", "ref", "suspend";
            interrupt-parent = <&gic>;
            interrupts = <0 40 4>;
            phys = <&usb3_phy0>, <&usb3_phy0>;
            phy-names = "usb2-phy", "usb3-phy";
            dr_mode = "host";
            snps,dis_u1_entry_quirk;
            snps,dis_u2_entry_quirk;
            disable-over-current;
            status = "okay";
        };
    };

    usb3_phy1: usb-phy@382f0040 {
        compatible = "fsl,imx8mp-usb-phy";
        reg = <0x382f0040 0x40>;
        clocks = <&clk_dummy_ipg>;
        clock-names = "phy";
        vbus-supply = <&reg_usb2_vbus>;
        #phy-cells = <0>;
        status = "okay";
    };

    usb3_1: usb@32f10108 {
        compatible = "fsl,imx8mp-dwc3";
        reg = <0x32f10108 0x04>;
        clocks = <&clk_dummy_usb_bus>, <&clk_dummy_ipg>, <&clk_dummy_ipg>;
        clock-names = "bus_early", "hsio", "suspend";
        interrupt-parent = <&gic>;
        interrupts = <0 149 4>;
        #address-cells = <1>;
        #size-cells = <1>;
        ranges;
        status = "okay";

        usb_dwc3_1: usb@38200000 {
            compatible = "snps,dwc3";
            reg = <0x38200000 0x10000>;
            clocks = <&clk_dummy_usb_bus>, <&clk_dummy_usb_ref>, <&clk_dummy_ipg>;
            clock-names = "bus_early", "ref", "suspend";
            interrupt-parent = <&gic>;
            interrupts = <0 41 4>;
            phys = <&usb3_phy1>, <&usb3_phy1>;
            phy-names = "usb2-phy", "usb3-phy";
            dr_mode = "host";
            snps,dis_u1_entry_quirk;
            snps,dis_u2_entry_quirk;
            disable-over-current;
            status = "okay";
        };
    };

    eqos: ethernet@30bf0000 {
        compatible = "nxp,imx8mp-dwmac-eqos", "snps,dwmac-5.10a";
        reg = <0x30bf0000 0x10000>;
        interrupts = <0 135 4>, <0 134 4>;
        interrupt-names = "macirq", "eth_wake_irq";
        clocks = <&clk_dummy_ipg>, <&clk_dummy_ipg>, <&clk_dummy_ipg>, <&clk_dummy_ipg>, <&clk_dummy_ipg>;
        clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "enet_clk_ref";
        nvmem-cells = <&eth_mac2>;
        nvmem-cell-names = "mac-address" ;
        intf_mode = <&gpr 0x4>;
        status = "okay";
        interrupt-parent = <&gic>;
        phy-handle = <&ethphy0>;
        phy-mode = "rgmii-id";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_eqos>;
        snps,force_thresh_dma_mode;
        snps,mtl-rx-config = <&mtl_rx_setup>;
        snps,mtl-tx-config = <&mtl_tx_setup>;

        mdio {
            compatible = "snps,dwmac-mdio";
            #address-cells = <1>;
            #size-cells = <0>;

            ethphy0: ethernet-phy@7 {
                compatible = "ethernet-phy-ieee802.3-c22";
                eee-broken-100tx;
                eee-broken-1000t;
                interrupt-parent = <&gpio1>;
                interrupts = <10 8>;
                micrel,led-mode = <0>;
                reg = <7>;
            };
        };

        mtl_rx_setup: rx-queues-config {
            snps,rx-queues-to-use = <5>;
            queue0 { snps,dcb-algorithm; snps,priority = <0x1>; snps,map-to-dma-channel = <0>; };
            queue1 { snps,dcb-algorithm; snps,priority = <0x2>; snps,map-to-dma-channel = <1>; };
            queue2 { snps,dcb-algorithm; snps,priority = <0x4>; snps,map-to-dma-channel = <2>; };
            queue3 { snps,dcb-algorithm; snps,priority = <0x8>; snps,map-to-dma-channel = <3>; };
            queue4 { snps,dcb-algorithm; snps,priority = <0xf0>; snps,map-to-dma-channel = <4>; };
        };

        mtl_tx_setup: tx-queues-config {
            snps,tx-queues-to-use = <5>;
            queue0 { snps,dcb-algorithm; snps,priority = <0x1>; };
            queue1 { snps,dcb-algorithm; snps,priority = <0x2>; };
            queue2 { snps,dcb-algorithm; snps,priority = <0x4>; };
            queue3 { snps,dcb-algorithm; snps,priority = <0x8>; };
            queue4 { snps,dcb-algorithm; snps,priority = <0xf0>; };
        };
    };

    usdhc3: mmc@30b60000 {
        compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc";
        reg = <0x30b60000 0x10000>;
        interrupts = <0 24 4>; 
        interrupt-parent = <&gic>;
        
        clocks = <&clk_dummy_ipg>, <&clk_dummy_ipg>, <&clk_dummy_ipg>;
        clock-names = "ipg", "ahb", "per";
        
        bus-width = <8>;
        non-removable;
        status = "okay";

        pinctrl-names = "default", "state_100mhz", "state_200mhz";
        pinctrl-0 = <&pinctrl_usdhc3>;
        pinctrl-1 = <&pinctrl_usdhc3>;
        pinctrl-2 = <&pinctrl_usdhc3>;
    };

    bao-ipc@f0000000 {
        compatible = "bao,ipcshmem";
        reg = <0xf0000000 0x00010000>;
        read-channel = <0x0 0x2000>;
        write-channel = <0x2000 0x2000>;
        interrupts = <0 20 1>;
        interrupt-parent = <&gic>;
        id = <0>;
    };
};

}; What else should I change or add? Can you give me some guidance?